Generally, a semiconductor device comprises an array, one or more regions, and one or more logic cells. The array generally comprises a metal oxide semiconductor (MOS) array, a metal oxide metal (MOM) array, or a resistor array. For example, the semiconductor device comprises active cells and surrounding patterns which surround at least some of the active cells. However, an active cell at an edge of a region of active cells and a region of surrounding patterns generally suffers from performance issues associated with an edge effect for arrays. For example, chemical-mechanical planarization (CMP) associated with fabrication of an array generally introduces performance issues causing undesirable device variation. Moreover, buffers associated with the array of the semiconductor device occupy space on the device in an undesirable manner.